Thin film transistors (TFTs) with better performance are required for incorporation into the next generation of mobile and high resolution displays to facilitate incorporation of functional circuits, such as controller, drivers, etc., on the same substrate as the pixel array. Such displays require TFTs which have low power consumption, low threshold voltages, a steep subthreshold slope, and high carrier mobility. Although many researchers have focused on polysilicon TFTs to achieve these goals, Tai et al., Performance of Poly-Si TFTs fabricated by SELAX, IEEE Trans. Electron Devices, Vol. 51, No. 6, pp 934–939 (2004); and Mizuki et al., Large Domains of Continuous Grain Silicon on Glass Substrate for High-Performance TFTs, IEEE Trans. Electron Devices, Vol. 51, No. 2, pp 204–211 (2004), the common objective is to reduce the grain boundaries and hence improve the TFT performance; Walker et al., Improved Off-Current and Subthreshold Slope in Aggressively Scaled Poly-Si TFTs With a Single Grain Boundary in the Channel, IEEE Trans. Electron Devices, Vol. 51, No. 2, pp 212–219 (2004).
In order to alleviate the grain boundary problem all together, single crystalline silicon TFTs have been demonstrated, Shi et al., Characterization of Low-Temperature Processed Single-Crystalline Silicon Thin-Film Transistor on Glass, IEEE Electron Device Letters, Vol. 24, No. 9, pp 574–576 (2003). A single crystalline silicon layer on glass was fabricated using an “ion-cutting” based layer transfer technique. A hydrogen implanted silicon wafer is first bonded to a glass wafer. A thin silicon film is next exfoliated from the silicon wafer and transferred to the glass wafer. The single crystalline silicon TFTs exhibited significantly higher electron mobility (˜430 cm2/V-sec), a steeper subthreshold slope and a lower leakage current, which was also relatively less sensitive to gate bias than previous known TFTs.
To further improve the TFT performance, TFTs fabricated on strained-silicon-on-glass (SSOG) wafer have been described by Maa et al., Method of Making Silicon-on-Glass via Layer Transfer, U.S. patent application Ser. No. 10/894,685, filed Jul. 20, 2004 (SLA.0864); and Maa et al., Strained Silicon-on-Insulator from Film Transfer and Relaxation by Hydrogen Implantation, U.S. patent application Ser. No. 10/755,615, filed Jan. 12, 2004 (SLA.0822). The strained silicon TFTs on glass demonstrated an effective electron mobility up to 850 cm2/V-sec, or nearly twice that of the single crystalline silicon TFT.